An article about the ParaDIME project has been published on Science Node website. The Science Node is a free online publication, jointly funded by organizations in the US and Europe.
Please, find the article by following this link A new ParaDIME for energy-efficient computing or by downloading the PDF file here below.
Researchers from the ParaDIME research project, coordinated by Barcelona Supercomputing Center, have successfully developed a number of methodologies which enable savings in data centre energy consumption ranging from 30% to 60%. These methodologies tackle several critical power-related research challenges, from using different current and future devices to inter-datacentre VM (virtual machine) scheduling.
At the programming model level, the focus has been on shifting from the shared memory model to an actor-based, message-passing programming model which enables programmers to achieve greater energy efficiency and become more energy aware. There are two illustrative approaches:
• Tailored programming solutions for heterogeneous GPU/CPU architectures. By directly managing the GPU through optimized code, energy consumption can be reduced by roughly 80%. However, this requires in-depth specialist knowledge, which reduces programmability. ParaDIME has developed techniques based on domain-specific languages (DSL) which generate code for both the CPU and GPU, resulting in energy savings of up to 40% while, crucially, empowering a far greater number of programmers to utilize these innovative architectures.
• Tools for power and cost awareness that estimate the power requirements of a single process being run in a virtualized environment. These tools can also be used for user-based pricing models, energy-aware task scheduling and as an indicator for how many heterogeneous resources are consumed by an application.
At the runtime level, ParaDIME has developed a large, decentralized infrastructure of small data centres that provide heating and hot water. This is motivated by the efficiency gains demonstrated by the project’s industrial partner Cloud&Heat. ParaDIME researchers have developed:
· The multi-datacentre scheduler: this schedules jobs across different data centres, striking a balance between data centre workloads and heating/cooling necessities, resulting in the reduction of CO2 emissions and energy consumption of up to 50%.
· An intra-datacentre scheduler: technologies have been developed to reduce the time needed to reactivate virtual machines and their migration costs. Parts of this work are under review by the QEMU – an open-source machine emulator and virtualizer – community. Institutions using QEMU to virtualize their workload will be able to benefit from ParaDIME-optimized virtual machine migration code. Furthermore, ParaDIME has contributed a feature to track changes to block devices that has already been incorporated into the latest Linux kernel.
At the hardware level, ParaDIME researchers have proposed and simulated several methodologies for improving energy-efficiency of the future computing node, including:
· Scheduling of tasks to heterogeneous cores (e.g. big.LITTLE processors, or systems that combine FPGA, GPU and CPU cores). On average, a 40% saving in energy consumption can be achieved by combining FPGA, GPU and CPU cores as opposed to a multicore processor. ParaDIME scheduling also reduces 20% of the power and 35% of the energy on average across different types of heterogeneous platforms. ParaDIME has also researched power estimation tools for a variety of core types.
· Aggressively lowering the supply voltage. Energy is saved by combining this with low-overhead error detection and correction techniques. In addition, ParaDIME researchers have explored this methodology for circuits built with future devices. The ParaDIME methodology saves up to 60% of the energy consumed by the L1 data cache.
Figure 1 ParaDIME infrastructure
About the ParaDIME project
ParaDIME ("Parallel Distributed Infrastructure for Minimization of Energy") was a three-year research project launched in September 2012 with a total budget of €3.2M, including €2.5M funding from the European Commission's Seventh Framework Programme. The project was coordinated by Barcelona Supercomputing Center (BSC) and partners were IMEC (Belgium), Technische Universität Dresden (Germany), Université de Neuchâtel (Switzerland) and Cloud&Heat (Germany).
The objective of this European project was to attack the power-wall problem by radical software-hardware techniques that are driven by future circuit and device characteristics on the hardware side, and by a programming model based on message-passing, and in a smart scheduling of the workload of data centres on the software side.
For further information, visit www.paradime-project.eu
ParaDIME was invited to present its results related to Power and Energy estimation at the System-Level at the TACLe Thematic Session. Link to the talk: https://www.hipeac.net/events/activities/7288/tacle/#fndtn-program. This talk was well attended by 55 people from 34 different institutions.
Abstract of the talk:
This talk was about the work done in the ParaDIME FP7 project about how to design and implement energy-aware computing and power estimation at the system-level for various types of low-power processors prototypes and to help improving energy efficiency of future computing systems. Power and energy consumption of processors are steadily increasing and the work performed by them at the data centers is not proportional to the power dissipated, where every µA is a revenue for the entity. On the one hand, the hardware community is proposing various methodologies to address this issue such as low-power processors, heterogeneity, etc. to reduce the power of the servers. On the other hand, the system software community proposes mechanisms such as virtual machines (VMs), work-load scheduling, etc. to increase the utilization of the processor. To properly evaluate the impact of these mechanisms, we need a fast and accurate power estimation tool at the system-level.
The link of the video will updated soon.
ParaDIME disseminated its research results as a part of the invited talk series at the ARM Research in Cambridge on 18th of September. This talk was attended by people from both ARM Cambridge and and from ARM, Austin, USA through a live feed.
First part of the talk was focused on how to design and implement energy-aware computing and power estimation in servers, MPSoCs and various types of data centers to help achieve an energy efficient computing future. Power and energy consumption of data centers are steadily increasing and the work performed by the data centers is not proportional to the power dissipated, where every µA is a revenue for the entity. On the one hand, the hardware community is proposing various methodologies to address this issue such as low-power processors, heterogeneity, etc. to reduce the power of the servers. On the other hand, the software community proposes mechanisms such as virtual machines (VMs), work-load scheduling, etc. to increase the utilization of the processor. In order to properly evaluate the impact of these mechanisms, we need an accurate power monitoring and estimation tool at the hardware host level, the VM level and the system-level. Achieving the target exascale performance and designing a green cloud computing infrastructure require the design of dynamic and smart techniques that recognize the hardware-software characteristics and optimization of the trade-off among performance, energy, and power in an application-aware manner. Second part of the talk was focused on a novel heterogeneous platform with the integration of three devices (CPU, GPU, FPGA) into a single system, i.e. Trigeneous platforms, to efficiently accelerate and to minimize energy of computation intensive applications in both high-performance computing and embedded system domains.
The paper entitled as FAcET: Fast and Accurate Power/Energy Estimation Tool for CPU-GPU Platforms at Architectural Level authored by Santhosh Kumar Rethinagiri, Oscar Palomar, Javier Arias Moreno, Osman Unsal and Adrian Cristal has been nominated the Best Paper Award at IEEE-SoCC 2015. This paper proposes a powerful power estimation tool at the system-level and a necessary tool for both application and architecture designers.
Abstract the paper:
This paper proposes a novel fast and accurate architectural-level tool to estimate power and energy (FAcET) for heterogeneous (CPU-GPU) system architecture based platforms. FAcET consists of two components. The first is a set of generic parametrizable power models generated by characterizing the functional-level activities for different blocks of the chosen platforms. The second is a simulation-based architectural-level prototype that uses SystemC (JIT) simulators to accurately evaluate the parameters of the corresponding power models of the first component. The combination of the two components leads to a novel power and energy estimation methodology at the architectural level that provides a better balance between speed and accuracy. The efficacy of the FAcET tool is verified against measurements taken on real board platforms, which consist of low-power ARM quad-core processors (Cortex-A7, -A9 and -A15), NVIDIA GPUs (Quadro 1000M, Quadro FX5600, Tegra K1, and GTX480) and heterogeneous platforms (NVIDIA Tegra3 and NVIDIA Jetson TK1). Power and energy estimation results obtained with FAcET deviate in less than 3.6% for quad-core processors, 6.5% for GPU, 10% for heterogeneous multiprocessor based systems from the measurements and estimation is 15x faster than state-of-the-art tools.
About the conference:
In its 27 years of history, the IEEE International System-on-Chip Conference (SOCC) has been the premier forum for sharing advances in system-on-chip (SoC) technologies, designs, tools, test, verification and applications. Held at changing locations in the USA, Europe and Asia, SOCC is attracting researchers and engineers from all over the world to exchange knowledge, share experiences and establish collaborations with colleagues. Each year, the IEEE-SoCC Programme Committee selects 3 papers to be nominated for the best paper award across 300˖ papers.
This month, a ParaDIME paper was presented at the 44th International Conference on Parallel Processing (ICPP), held from 1-4 of September 2015, in Beijing, China.
The paper entitled “DiMP: Architectural Support for Direct Message Passing on Shared Memory Multi-cores” was authored by Ruben Titos-Gil, Oscar Palomar, Osman Unsal and Adrian Cristal, from Barcelona Supercomputing Center. It proposes and evaluates a set of ISA extensions, and their associated hardware support, aimed at reducing some of the overheads that message passing workloads suffer when executed on a commodity shared-memory multicore.
- Basic on the physics of energy transformations at micro and nanoscales
- Introduction to energy harvesting and distributed autonomous mobile devices
- Software and energy aware computing
- High performance computing and systems
ParaDIME researcher Santhosh Rethinagiri presented two out of four High performance computing systems sessions: "Introduction to data-centers" and "Tools and methodologies for energy-aware data-centers".
The presentations can be found in the website of the Summer School. Please, visit the ICT-Energy website, Facebook page and Twitter timeline to find out more information. A Facebook group from the Summer School was also created.
ParaDIME project is member of the Consortium of the coordination activity ICT-Energy.
ICT-Energy, a coordinated activity where ParaDIME project belongs, hosted a live Twitter chat on the 18th of June in the framework of the Sustainable Energy Week and the Micro-Energy Day. The Twitter chat could be followed by the hashtag #LessEnergyICT. Below these line you can read the Storify of the live chat.
During the week, ParaDIME partner Barcelona Supercomputing Center offered information to the visitors to the MareNostrum supercomputer about micro-energy. Micro-energy refers to the energy that is often disregarded as unimportant but actually plays a significant role in our daily life. As an example… when you run out of battery in your mobile phone and really need to make that call!!! The amount of energy involved in this case is really very small compared to the energy required to drive a car, but you definitely notice when it's not there…
This month, a ParaDIME paper was presented at the 10th International Federated Conference on Distributed Computing Techniques (DAIS), held from 2-5 of June in Grenoble, France. The DAIS conference, part of the IFIP Distributed Computing Techniques (DisCoTec) series of federated conferences, is one of the leading international venues to discuss all aspects of distributed applications and systems.
The paper entitled “Dynamic Message Processing and Transactional Memory in the Actor Model” was authored by Yaroslav Hayduk, Anita Sobe and Pascal Felber from the University of Neuchâtel. It discusses strategies for processing messages concurrently in the Actor Model in cases of high contention.