Export 55 results:
" PVMC: Programmable Vector Memory Controller", The 25th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) , Zurich, Switzerland, IEEE, 07/2014.
"Exploiting a Fast and Simple ECC for Scaling Supply Voltage in Level-1 Caches", 20th IEEE International On-Line Testing Symposium, Spain, 07/2014.
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy at the Architectural Level", ICT Energy Newsletters, Barcelona, 07/2014.
"PowerCass: Energy Efficient, Consisten Hashing Based Storage for Micro Clouds Based Infrastructure", IEEE 7th International Conference on Cloud Computing: IEEE, 07/2014.
"System-Level Power and Energy Estimation Methodology for Open Multimedia Applications Platform", In Proceedings of IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI 2014), Tampa, Florida, IEEE, 07/2014.
"DreamServer: Truly On-Demand Cloud Services", International Systems and Storage Conference, Haifa, Israel, ACM, 06/2014.
"Neighbor-Cell Assisted Error Correction for MLC NAND Flash Memories", ACM SIGMETRICS, Austin, TX, ACM, 06/2014.
"Scaling of BTI reliability in presence of Time-zero Variability Pathfinding from planar FET to advanced 3-D FinFET nodes", IEEE International Reliability Physics Symposium , Waikoloa, HI USA, IEEE, 06/2014.
"BTI reliability from Planar to FinFET nodes Will the next node be more or less reliable?", The Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'14) Co-Located with DATE 2014, Dresden, Germany, 03/2014.
"Degradation Analysis of Datapath Logic Subblocks under NBTI Aging in FinFET Technology", The International Symposium on Quality Electronic Design (ISQED 2014), Santa Clara, California, USA, IEEE, 03/2014.
"Dynamic Concurrent Message Processing with Transactional Memory in the Actor Model", 9th Workshop on Transactional Computing (co-located with ASPLOS 2014) , Salt Lake City, Utah, USA , ACM SIGPLAN, 03/2014.
"PETS: Power and Energy Estimation Tool at System-Level", The International Symposium on Quality Electronic Design (ISQED 2014), Santa Clara, California, USA, IEEE, 03/2014.
"Combining Error Detection and Transactional Memory for Energy-efficient Computing below Safe Operation Margins", Parallel, Distributed, and Network-Based Processing (PDP), Turin, Italy, IEEE, 02/2014.
"Power Estimation Tool for System on Programmable Chip based Platforms", 22nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2014), Monterey, California, USA, ACM, 02/2014.
"Dynamic parallel message processing with transactional memory in the actor model", Joint Euro-TM/MEDIAN Workshop on Dependable Multicore and Transactional Memory Systems (DMTM), In conjunction with Hipeac 2014, Vienna, Austria, 01/2014.
"ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy", Joint Euro-TM/MEDIAN Workshop on Dependable Multicore and Transactional Memory Systems (DMTM), In conjunction with Hipeac 2014, Vienna, Austria, 01/2014.
"System-Level Power Estimation Tool for Embedded Processor based Platforms", 6th Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO14), In conjunction with Hipeac 2014 Conference, Vienna, Austria, ACM, 01/2014.
"Lightweight automatic resource scaling for multi-tier web applications", 7th IEEE International Conference on Cloud Computing: IEEE, 2014.
"The Turbo Diaries: Application-controlled Frequency Scaling Explained", Proceedings of the 2014 USENIX Annual Technical Conference, Berkeley, CA, USA, USENIX Association, 2014.
"Speculative Concurrent Processing with Transactional Memory in the Actor Model", International Conference on Principles of Distributed Systems (OPODIS): Springer LNCS, 12/2013.
"dsync: Efficient Block-wise Synchronization of Multi-Gigabyte Binary Data", Large Installation and System Administration Conference: USENIX, 11/2013.
"Fast Virtual Machine Resume for Agile Cloud Services", International Conference on Cloud and Green Computing: IEEE Computer Society, 09/2013.
"Improving Wide-area Replication Performance through Informed Leader Election and Overlay Construction", International Conference on Cloud Computing: IEEE Computer Society, 07/2013.
"Between All and Nothing - Versatile Aborts in Hardware Transactional Memory", Symposium on Parallelism in Algorithms and Architectures: ACM, 06/2013.
"Biologically Sound Neural Networks for Embedded Systems Using OpenCL", NETYS 2013, Marrakech, Morocco, Springer LNCS Vol. 7853 2013, 05/2013.